CPU-Z80-Disassembler

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t/data/zx81.ctl  view on Meta::CPAN

	:; place error code in system variable ERR_NR

005B:C
005B ED7B0240   ld sp, ($4002)	:C
	:; set the stack pointer from ERR_SP

005F:C
005F CD0702     call $0207	:C
	:; routine SLOW/FAST selects slow mode.

0062:C
0062 C3BC14     jp $14BC	:C
	:; exit to address on stack via routine SET-MIN.
	:;

0065:B
	:#; ---
	:#
0065-0065 FF	:B
	:; unused.
	:;

0066:C
	:#; ------------------------------------
	:#; THE 'NON MASKABLE INTERRUPT' ROUTINE
	:#; ------------------------------------
	:#;   Jim Westwood's technical dodge using Non-Maskable Interrupts solved the
	:#;   flicker problem of the ZX80 and gave the ZX81 a multi-tasking SLOW mode 
	:#;   with a steady display.  Note that the AF' register is reserved for this 
	:#;   function and its interaction with the display routines.  When counting 
	:#;   TV lines, the NMI makes no use of the main registers.
	:#;   The circuitry for the NMI generator is contained within the SCL (Sinclair 
	:#;   Computer Logic) chip. 
	:#;   ( It takes 32 clock cycles while incrementing towards zero ). 
	:#
	:#;; NMI
0066 08         ex af, af'	:C NMI
	:; (4) switch in the NMI's copy of the 
	:;     accumulator.

0067:C
0067 3C         inc a	:C
	:; (4) increment.

0068:C
0068 FA6D00     jp m, $006D	:C
	:; (10/10) jump, if minus, to NMI-RET as this is
	:;     part of a test to see if the NMI 
	:;     generation is working or an intermediate 
	:;     value for the ascending negated blank 
	:;     line counter.
	:;

006B:C
006B 2802       jr z, $006F	:C
	:; (12) forward to NMI-CONT
	:;      when line count has incremented to zero.
	:;

006D:C
	:#; Note. the synchronizing NMI when A increments from zero to one takes this
	:#; 7 clock cycle route making 39 clock cycles in all.
	:#
	:#;; NMI-RET
006D 08         ex af, af'	:C NMI_RET
	:; (4)  switch out the incremented line counter
	:;      or test result $80

006E:C
006E C9         ret	:C
	:; (10) return to User application for a while.
	:;

006F:C
	:#; ---
	:#
	:#;   This branch is taken when the 55 (or 31) lines have been drawn.
	:#
	:#;; NMI-CONT
006F 08         ex af, af'	:C NMI_CONT
	:; (4) restore the main accumulator.
	:;

0070:C
0070 F5         push af	:C
	:; (11) *             Save Main Registers

0071:C
0071 C5         push bc	:C
	:; (11) **

0072:C
0072 D5         push de	:C
	:; (11) ***

0073:C
0073 E5         push hl	:C
	:; (11) ****
	:;

0074:C
	:#;   the next set-up procedure is only really applicable when the top set of 
	:#;   blank lines have been generated.
	:#
0074 2A0C40     ld hl, ($400C)	:C
	:; (16) fetch start of Display File from D_FILE
	:;      points to the HALT at beginning.

0077:C
0077 CBFC       set 7, h	:C
	:; (8) point to upper 32K 'echo display file'
	:;

0079:C
0079 76         halt	:C
	:; (1) HALT synchronizes with NMI.  
	:; Used with special hardware connected to the
	:; Z80 HALT and WAIT lines to take 1 clock cycle.
	:;

007A:C
	:#; ----------------------------------------------------------------------------
	:#;   the NMI has been generated - start counting. The cathode ray is at the RH 
	:#;   side of the TV.
	:#;   First the NMI servicing, similar to CALL            =  17 clock cycles.
	:#;   Then the time taken by the NMI for zero-to-one path =  39 cycles
	:#;   The HALT above                                      =  01 cycles.
	:#;   The two instructions below                          =  19 cycles.
	:#;   The code at L0281 up to and including the CALL      =  43 cycles.
	:#;   The Called routine at L02B5                         =  24 cycles.
	:#;   --------------------------------------                ---
	:#;   Total Z80 instructions                              = 143 cycles.
	:#;
	:#;   Meanwhile in TV world,
	:#;   Horizontal retrace                                  =  15 cycles.
	:#;   Left blanking border 8 character positions          =  32 cycles
	:#;   Generation of 75% scanline from the first NEWLINE   =  96 cycles
	:#;   ---------------------------------------               ---
	:#;                                                         143 cycles
	:#;
	:#;   Since at the time the first JP (HL) is encountered to execute the echo
	:#;   display another 8 character positions have to be put out, then the
	:#;   Refresh register need to hold $F8. Working back and counteracting 
	:#;   the fact that every instruction increments the Refresh register then
	:#;   the value that is loaded into R needs to be $F5.      :-)
	:#;
	:#;
007A D3FD       out ($FD), a	:C
	:; (11) Stop the NMI generator.
	:;

007C:C
007C DDE9       jp (ix)	:C
	:; (8) forward to L0281 (after top) or L028F
	:;

007E:B
	:#; ****************
	:#; ** KEY TABLES **
	:#; ****************
	:#
	:#; -------------------------------
	:#; THE 'UNSHIFTED' CHARACTER CODES
	:#; -------------------------------
	:#
	:#;; K-UNSHIFT
007E-007E 3F	:B K_UNSHIFT
	:; Z

007F:B
007F-007F 3D	:B
	:; X

0080:B
0080-0080 28	:B
	:; C

t/data/zx81.ctl  view on Meta::CPAN

0230:C
0230 B5         or l	:C
	:; and any bits of L.

0231:C
0231 7C         ld a, h	:C
	:; reload A with all bits of H for PAUSE test.
	:;

0232:C
	:#;   Note both branches must take the same time.
	:#
0232 2003       jr nz, $0237	:C
	:; (12/7) forward if bits 14-0 are not zero 
	:; to ANOTHER
	:;

0234:C
0234 17         rla	:C
	:; (4) test bit 15 of FRAMES.

0235:C
0235 1802       jr $0239	:C
	:; (12) forward with result to OVER-NC
	:;

0237:C
	:#; ---
	:#
	:#;; ANOTHER
0237 46         ld b, (hl)	:C ANOTHER
	:; (7) Note. Harmless Nonsensical Timing weight.

0238:C
0238 37         scf	:C
	:; (4) Set Carry Flag.
	:;

0239:C
	:#; Note. the branch to here takes either (12)(7)(4) cyles or (7)(4)(12) cycles.
	:#
	:#;; OVER-NC
0239 67         ld h, a	:C OVER_NC
	:; (4)  set H to zero

023A:C
023A 223440     ld ($4034), hl	:C
	:; (16) update system variable FRAMES 

023D:C
023D D0         ret nc	:C
	:; (11/5) return if FRAMES is in use by PAUSE 
	:; command.
	:;

023E:C
	:#;; DISPLAY-2
023E CDBB02     call $02BB	:C DISPLAY_2
	:; routine KEYBOARD gets the key row in H and 
	:; the column in L. Reading the ports also starts
	:; the TV frame synchronization pulse. (VSYNC)
	:;

0241:C
0241 ED4B2540   ld bc, ($4025)	:C
	:; fetch the last key values read from LAST_K

0245:C
0245 222540     ld ($4025), hl	:C
	:; update LAST_K with new values.
	:;

0248:C
0248 78         ld a, b	:C
	:; load A with previous column - will be $FF if
	:; there was no key.

0249:C
0249 C602       add a, $02	:C
	:; adding two will set carry if no previous key.
	:;

024B:C
024B ED42       sbc hl, bc	:C
	:; subtract with the carry the two key values.
	:;

024D:C
	:#; If the same key value has been returned twice then HL will be zero.
	:#
024D 3A2740     ld a, ($4027)	:C
	:; fetch system variable DEBOUNCE

0250:C
0250 B4         or h	:C
	:; and OR with both bytes of the difference

0251:C
0251 B5         or l	:C
	:; setting the zero flag for the upcoming branch.
	:;

0252:C
0252 58         ld e, b	:C
	:; transfer the column value to E

0253:C
0253 060B       ld b, $0B	:C
	:; and load B with eleven 
	:;

0255:C
0255 213B40     ld hl, $403B	:C
	:; address system variable CDFLAG

0258:C
0258 CB86       res 0, (hl)	:C
	:; reset the rightmost bit of CDFLAG

025A:C
025A 2008       jr nz, $0264	:C

t/data/zx81.ctl  view on Meta::CPAN

0264:C
	:#;; NO-KEY
0264 212740     ld hl, $4027	:C NO_KEY
	:; sv DEBOUNCE

0267:C
0267 3F         ccf	:C
	:; Complement Carry Flag

0268:C
0268 CB10       rl b	:C
	:; rotate left B picking up carry
	:;  C<-76543210<-C
	:;

026A:C
	:#;; LOOP-B
026A 10FE       djnz $026A	:C LOOP_B
	:; self-loop while B>0 to LOOP-B
	:;

026C:C
026C 46         ld b, (hl)	:C
	:; fetch value of DEBOUNCE to B

026D:C
026D 7B         ld a, e	:C
	:; transfer column value

026E:C
026E FEFE       cp $FE	:C
	:;

0270:C
0270 9F         sbc a, a	:C
	:;

0271:C
0271 061F       ld b, $1F	:C
	:;

0273:C
0273 B6         or (hl)	:C
	:;

0274:C
0274 A0         and b	:C
	:;

0275:C
0275 1F         rra	:C
	:;

0276:C
0276 77         ld (hl), a	:C
	:;
	:;

0277:C
0277 D3FF       out ($FF), a	:C
	:; end the TV frame synchronization pulse.
	:;

0279:C
0279 2A0C40     ld hl, ($400C)	:C
	:; (12) set HL to the Display File from D_FILE

027C:C
027C CBFC       set 7, h	:C
	:; (8) set bit 15 to address the echo display.
	:;

027E:C
027E CD9202     call $0292	:C
	:; (17) routine DISPLAY-3 displays the top set 
	:; of blank lines.
	:;

0281:C
	:#; ---------------------
	:#; THE 'VIDEO-1' ROUTINE
	:#; ---------------------
	:#
	:#;; R-IX-1
0281 ED5F       ld a, r	:C R_IX_1
	:; (9)  Harmless Nonsensical Timing or something
	:;      very clever?

0283:C
0283 010119     ld bc, $1901	:C
	:; (10) 25 lines, 1 scanline in first.

0286:C
0286 3EF5       ld a, $F5	:C
	:; (7)  This value will be loaded into R and 
	:; ensures that the cycle starts at the right 
	:; part of the display  - after 32nd character 
	:; position.
	:;

0288:C
0288 CDB502     call $02B5	:C
	:; (17) routine DISPLAY-5 completes the current 
	:; blank line and then generates the display of 
	:; the live picture using INT interrupts
	:; The final interrupt returns to the next 
	:; address.
	:;

028B:C
028B 2B         dec hl	:C
	:; point HL to the last NEWLINE/HALT.
	:;

028C:C
028C CD9202     call $0292	:C
	:; routine DISPLAY-3 displays the bottom set of
	:; blank lines.
	:;

028F:C



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