CPU-Z80-Disassembler

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t/data/zx81.ctl  view on Meta::CPAN

	:#;; end-calc
002B F1         pop af	:C end_calc
	:; drop the calculator return address RE-ENTRY

002C:C
002C D9         exx	:C
	:; switch to the other set.
	:;

002D:C
002D E3         ex (sp), hl	:C
	:; transfer H'L' to machine stack for the
	:; return address.
	:; when exiting recursion then the previous
	:; pointer is transferred to H'L'.
	:;

002E:C
002E D9         exx	:C
	:; back to main set.

002F:C
002F C9         ret	:C
	:; return.
	:;
	:;

0030:C
	:#; -----------------------------
	:#; THE 'MAKE BC SPACES'  RESTART
	:#; -----------------------------
	:#; This restart is used eight times to create, in workspace, the number of
	:#; spaces passed in the BC register.
	:#
	:#;; BC-SPACES
0030 C5         push bc	:C BC_SPACES
	:; push number of spaces on stack.

0031:C
0031 2A1440     ld hl, ($4014)	:C
	:; fetch edit line location from E_LINE.

0034:C
0034 E5         push hl	:C
	:; save this value on stack.

0035:C
0035 C38814     jp $1488	:C
	:; jump forward to continue at RESERVE.
	:;

0038:C
	:#; -----------------------
	:#; THE 'INTERRUPT' RESTART
	:#; -----------------------
	:#;   The Mode 1 Interrupt routine is concerned solely with generating the central
	:#;   television picture.
	:#;   On the ZX81 interrupts are enabled only during the interrupt routine, 
	:#;   although the interrupt 
	:#;   This Interrupt Service Routine automatically disables interrupts at the 
	:#;   outset and the last interrupt in a cascade exits before the interrupts are
	:#;   enabled.
	:#;   There is no DI instruction in the ZX81 ROM.
	:#;   An maskable interrupt is triggered when bit 6 of the Z80's Refresh register
	:#;   changes from set to reset.
	:#;   The Z80 will always be executing a HALT (NEWLINE) when the interrupt occurs.
	:#;   A HALT instruction repeatedly executes NOPS but the seven lower bits
	:#;   of the Refresh register are incremented each time as they are when any 
	:#;   simple instruction is executed. (The lower 7 bits are incremented twice for
	:#;   a prefixed instruction)
	:#;   This is controlled by the Sinclair Computer Logic Chip - manufactured from 
	:#;   a Ferranti Uncommitted Logic Array.
	:#;
	:#;   When a Mode 1 Interrupt occurs the Program Counter, which is the address in
	:#;   the upper echo display following the NEWLINE/HALT instruction, goes on the 
	:#;   machine stack.  193 interrupts are required to generate the last part of
	:#;   the 56th border line and then the 192 lines of the central TV picture and, 
	:#;   although each interrupt interrupts the previous one, there are no stack 
	:#;   problems as the 'return address' is discarded each time.
	:#;
	:#;   The scan line counter in C counts down from 8 to 1 within the generation of
	:#;   each text line. For the first interrupt in a cascade the initial value of 
	:#;   C is set to 1 for the last border line.
	:#;   Timing is of the utmost importance as the RH border, horizontal retrace
	:#;   and LH border are mostly generated in the 58 clock cycles this routine 
	:#;   takes .
	:#
	:#;; INTERRUPT
0038 0D         dec c	:C INTERRUPT
	:; (4)  decrement C - the scan line counter.

0039:C
0039 C24500     jp nz, $0045	:C
	:; (10/10) JUMP forward if not zero to SCAN-LINE
	:;

003C:C
003C E1         pop hl	:C
	:; (10) point to start of next row in display 
	:;      file.
	:;

003D:C
003D 05         dec b	:C
	:; (4)  decrement the row counter. (4)

003E:C
003E C8         ret z	:C
	:; (11/5) return when picture complete to L028B
	:;      with interrupts disabled.
	:;

003F:C
003F CBD9       set 3, c	:C
	:; (8)  Load the scan line counter with eight.  
	:;      Note. LD C,$08 is 7 clock cycles which 
	:;      is way too fast.
	:;

0041:C
	:#; ->
	:#
	:#;; WAIT-INT
0041 ED4F       ld r, a	:C WAIT_INT
	:; (9) Load R with initial rising value $DD.
	:;

0043:C
0043 FB         ei	:C
	:; (4) Enable Interrupts.  [ R is now $DE ].
	:;

0044:C
0044 E9         jp (hl)	:C
	:; (4) jump to the echo display file in upper
	:;     memory and execute characters $00 - $3F 
	:;     as NOP instructions.  The video hardware 
	:;     is able to read these characters and, 
	:;     with the I register is able to convert 
	:;     the character bitmaps in this ROM into a 
	:;     line of bytes. Eventually the NEWLINE/HALT
	:;     will be encountered before R reaches $FF. 



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