CPU-Z80-Disassembler
view release on metacpan or search on metacpan
t/data/zx81.asm view on Meta::CPAN
; ---
defb $FF, $FF, $FF ; unused locations.
;
; ---------------------------------------
; THE 'FLOATING POINT CALCULATOR' RESTART
; ---------------------------------------
; this restart jumps to the recursive floating-point calculator.
; the ZX81's internal, FORTH-like, stack-based language.
;
; In the five remaining bytes there is, appropriately, enough room for the
; end-calc literal - the instruction which exits the calculator.
;; FP-CALC
FP_CALC:
jp CALCULATE ; jump immediately to the CALCULATE routine.
;
; ---
;; end-calc
end_calc:
pop af ; drop the calculator return address RE-ENTRY
exx ; switch to the other set.
;
ex (sp), hl ; transfer H'L' to machine stack for the
; return address.
; when exiting recursion then the previous
; pointer is transferred to H'L'.
;
exx ; back to main set.
ret ; return.
;
;
; -----------------------------
; THE 'MAKE BC SPACES' RESTART
; -----------------------------
; This restart is used eight times to create, in workspace, the number of
; spaces passed in the BC register.
;; BC-SPACES
BC_SPACES:
push bc ; push number of spaces on stack.
ld hl, (E_LINE) ; fetch edit line location from E_LINE.
push hl ; save this value on stack.
jp RESERVE ; jump forward to continue at RESERVE.
;
; -----------------------
; THE 'INTERRUPT' RESTART
; -----------------------
; The Mode 1 Interrupt routine is concerned solely with generating the central
; television picture.
; On the ZX81 interrupts are enabled only during the interrupt routine,
; although the interrupt
; This Interrupt Service Routine automatically disables interrupts at the
; outset and the last interrupt in a cascade exits before the interrupts are
; enabled.
; There is no DI instruction in the ZX81 ROM.
; An maskable interrupt is triggered when bit 6 of the Z80's Refresh register
; changes from set to reset.
; The Z80 will always be executing a HALT (NEWLINE) when the interrupt occurs.
; A HALT instruction repeatedly executes NOPS but the seven lower bits
; of the Refresh register are incremented each time as they are when any
; simple instruction is executed. (The lower 7 bits are incremented twice for
; a prefixed instruction)
; This is controlled by the Sinclair Computer Logic Chip - manufactured from
; a Ferranti Uncommitted Logic Array.
;
; When a Mode 1 Interrupt occurs the Program Counter, which is the address in
; the upper echo display following the NEWLINE/HALT instruction, goes on the
; machine stack. 193 interrupts are required to generate the last part of
; the 56th border line and then the 192 lines of the central TV picture and,
; although each interrupt interrupts the previous one, there are no stack
; problems as the 'return address' is discarded each time.
;
; The scan line counter in C counts down from 8 to 1 within the generation of
; each text line. For the first interrupt in a cascade the initial value of
; C is set to 1 for the last border line.
; Timing is of the utmost importance as the RH border, horizontal retrace
; and LH border are mostly generated in the 58 clock cycles this routine
; takes .
;; INTERRUPT
INTERRUPT:
dec c ; (4) decrement C - the scan line counter.
jp nz, SCAN_LINE ; (10/10) JUMP forward if not zero to SCAN-LINE
;
pop hl ; (10) point to start of next row in display
; file.
;
dec b ; (4) decrement the row counter. (4)
ret z ; (11/5) return when picture complete to L028B
; with interrupts disabled.
;
set 3, c ; (8) Load the scan line counter with eight.
; Note. LD C,$08 is 7 clock cycles which
; is way too fast.
;
; ->
;; WAIT-INT
WAIT_INT:
ld r, a ; (9) Load R with initial rising value $DD.
;
ei ; (4) Enable Interrupts. [ R is now $DE ].
;
jp (hl) ; (4) jump to the echo display file in upper
; memory and execute characters $00 - $3F
; as NOP instructions. The video hardware
; is able to read these characters and,
; with the I register is able to convert
; the character bitmaps in this ROM into a
; line of bytes. Eventually the NEWLINE/HALT
; will be encountered before R reaches $FF.
; It is however the transition from $FF to
; $80 that triggers the next interrupt.
; [ The Refresh register is now $DF ]
;
; ---
;; SCAN-LINE
SCAN_LINE:
pop de ; (10) discard the address after NEWLINE as the
; same text line has to be done again
; eight times.
;
ret z ; (5) Harmless Nonsensical Timing.
; (condition never met)
;
jr WAIT_INT ; (12) back to WAIT-INT
;
; Note. that a computer with less than 4K or RAM will have a collapsed
( run in 0.487 second using v1.01-cache-2.11-cpan-e93a5daba3e )