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  are met:
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      notice, this list of conditions and the following disclaimer.
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      notice, this list of conditions and the following disclaimer in
      the documentation and/or other materials provided with the
      distribution.
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      contributors may be used to endorse or promote products derived
      from this software without specific prior written permission.

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	.arch armv8-a+crypto
	.text
	.align	2
	.p2align 3,,7

/*
Macros
*/

.macro	declare_var_vector_reg name:req,reg:req
	\name\()_q	.req	q\reg
	\name\()_v	.req	v\reg
	\name\()_s	.req	s\reg
.endm
/**
maros for round 48-63
*/
.macro sha256_4_rounds_high msg:req,tmp0:req,tmp1:req
	ldr		key_q , [tmp]
	mov		l0_tmp2_v.16b,l0_abcd_v.16b
	mov		l1_tmp2_v.16b,l1_abcd_v.16b
	add		tmp,tmp,16
	add		l0_\tmp1\()_v.4s,l0_\msg\()_v.4s,key_v.4s
	add		l1_\tmp1\()_v.4s,l1_\msg\()_v.4s,key_v.4s
	sha256h		l0_abcd_q,l0_efgh_q,l0_\tmp0\()_v.4s
	sha256h		l1_abcd_q,l1_efgh_q,l1_\tmp0\()_v.4s
	sha256h2	l0_efgh_q,l0_tmp2_q,l0_\tmp0\()_v.4s
	sha256h2	l1_efgh_q,l1_tmp2_q,l1_\tmp0\()_v.4s

.endm
/**
maros for round 0-47
*/
.macro sha256_4_rounds_low msg0:req,msg1:req,msg2:req,msg3:req,tmp0:req,tmp1:req
	sha256su0		l0_\msg0\()_v.4s,l0_\msg1\()_v.4s
	sha256su0		l1_\msg0\()_v.4s,l1_\msg1\()_v.4s
	sha256_4_rounds_high	\msg1,\tmp0,\tmp1
	sha256su1		l0_\msg0\()_v.4s,l0_\msg2\()_v.4s,l0_\msg3\()_v.4s
	sha256su1		l1_\msg0\()_v.4s,l1_\msg2\()_v.4s,l1_\msg3\()_v.4s
.endm


/*
Variable list
*/

	declare_var_vector_reg	key,31


/*
digest variables
*/
	declare_var_vector_reg	l0_abcd,0
	declare_var_vector_reg	l0_efgh,1
	declare_var_vector_reg	l0_abcd_saved,2
	declare_var_vector_reg	l0_efgh_saved,3
	declare_var_vector_reg	l1_abcd,4
	declare_var_vector_reg	l1_efgh,5
	declare_var_vector_reg	l1_abcd_saved,6
	declare_var_vector_reg	l1_efgh_saved,7
/*
Temporay variables
*/
	declare_var_vector_reg	l0_tmp0,8
	declare_var_vector_reg	l0_tmp1,9
	declare_var_vector_reg	l0_tmp2,10
	declare_var_vector_reg	l1_tmp0,11