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  are met:
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      the documentation and/or other materials provided with the
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      contributors may be used to endorse or promote products derived
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	.arch armv8-a+crypto
	.text
	.align	2
	.p2align 3,,7

/*
Macros
*/

.macro	declare_var_vector_reg name:req,reg:req
	\name\()_q	.req	q\reg
	\name\()_v	.req	v\reg
	\name\()_s	.req	s\reg
.endm

/**
maros for round 4-67
*/
.macro sha1_4_rounds inst:req,msg0:req,msg1:req,msg2:req,msg3:req,abcd:req,e0:req,tmp0:req,e1:req,tmp1:req,k:req
	sha1h	\e0\()_s, \abcd\()_s
	\inst	\abcd\()_q,\e1\()_s,\tmp1\()_v.4s
	add 	\tmp1\()_v.4s,\msg3\()_v.4s,\k\()_v.4s
	sha1su1	\msg0\()_v.4s,\msg3\()_v.4s
	sha1su0	\msg1\()_v.4s,\msg2\()_v.4s,\msg3\()_v.4s
.endm


/*
Variable list
*/

	declare_var_vector_reg	key_0,28
	declare_var_vector_reg	key_1,29
	declare_var_vector_reg	key_2,30
	declare_var_vector_reg	key_3,31


/*
digest variables
*/
	declare_var_vector_reg	abcd,0
	declare_var_vector_reg	e0,1
	declare_var_vector_reg	e1,2
	declare_var_vector_reg	abcd_saved,3
	declare_var_vector_reg	e0_saved,4
/*
Message variables
*/
	declare_var_vector_reg	msg_0,16
	declare_var_vector_reg	msg_1,17
	declare_var_vector_reg	msg_2,18
	declare_var_vector_reg	msg_3,19
/*
Temporay variables
*/
	declare_var_vector_reg	tmp_0,5
	declare_var_vector_reg	tmp_1,6

/*
	void sha1_mb_ce_x1(SHA1_JOB * job, int len);
*/
/*
Arguements list
*/
	job 	.req	x0
	len	.req	w1
	data	.req	x2