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ffi/target/release/build/mlua-sys-6a99a2ae50f12319/out/luajit-build/build/src/vm_x86.dasc  view on Meta::CPAN

  |  .ffunc_nsse math_ .. func
  |.if not X64
  |  movsd FPARG1, xmm0
  |.endif
  |  mov RB, BASE
  |  call extern func
  |  mov BASE, RB
  |  jmp ->fff_resfp
  |.endmacro
  |
  |.macro math_extern2, func
  |  .ffunc_nnsse math_ .. func
  |.if not X64
  |  movsd FPARG1, xmm0
  |  movsd FPARG3, xmm1
  |.endif
  |  mov RB, BASE
  |  call extern func
  |  mov BASE, RB
  |  jmp ->fff_resfp
  |.endmacro
  |
  |  math_extern log10
  |  math_extern exp
  |  math_extern sin
  |  math_extern cos
  |  math_extern tan
  |  math_extern asin
  |  math_extern acos
  |  math_extern atan
  |  math_extern sinh
  |  math_extern cosh
  |  math_extern tanh
  |  math_extern2 pow
  |  math_extern2 atan2
  |  math_extern2 fmod
  |
  |.ffunc_nnr math_ldexp;	fscale; fpop1;	jmp ->fff_resn
  |
  |.ffunc_1 math_frexp
  |  mov RB, [BASE+4]
  |  cmp RB, LJ_TISNUM;  jae ->fff_fallback
  |  mov PC, [BASE-4]
  |  mov RC, [BASE]
  |  mov [BASE-4], RB; mov [BASE-8], RC
  |  shl RB, 1; cmp RB, 0xffe00000; jae >3
  |  or RC, RB; jz >3
  |  mov RC, 1022
  |  cmp RB, 0x00200000; jb >4
  |1:
  |  shr RB, 21; sub RB, RC		// Extract and unbias exponent.
  |  cvtsi2sd xmm0, RB
  |  mov RB, [BASE-4]
  |  and RB, 0x800fffff			// Mask off exponent.
  |  or RB, 0x3fe00000			// Put mantissa in range [0.5,1) or 0.
  |  mov [BASE-4], RB
  |2:
  |  movsd qword [BASE], xmm0
  |  mov RD, 1+2
  |  jmp ->fff_res
  |3:  // Return +-0, +-Inf, NaN unmodified and an exponent of 0.
  |  xorps xmm0, xmm0; jmp <2
  |4:  // Handle denormals by multiplying with 2^54 and adjusting the bias.
  |  movsd xmm0, qword [BASE]
  |  sseconst_hi xmm1, RBa, 43500000  // 2^54.
  |  mulsd xmm0, xmm1
  |  movsd qword [BASE-8], xmm0
  |  mov RB, [BASE-4]; mov RC, 1076; shl RB, 1; jmp <1
  |
  |.ffunc_nsse math_modf
  |  mov RB, [BASE+4]
  |  mov PC, [BASE-4]
  |  shl RB, 1; cmp RB, 0xffe00000; je >4	// +-Inf?
  |  movaps xmm4, xmm0
  |  call ->vm_trunc_sse
  |  subsd xmm4, xmm0
  |1:
  |  movsd qword [BASE-8], xmm0
  |  movsd qword [BASE], xmm4
  |  mov RC, [BASE-4]; mov RB, [BASE+4]
  |  xor RC, RB; js >3				// Need to adjust sign?
  |2:
  |  mov RD, 1+2
  |  jmp ->fff_res
  |3:
  |  xor RB, 0x80000000; mov [BASE+4], RB	// Flip sign of fraction.
  |  jmp <2
  |4:
  |  xorps xmm4, xmm4; jmp <1			// Return +-Inf and +-0.
  |
  |.macro math_minmax, name, cmovop, sseop
  |  .ffunc_1 name
  |  mov RA, 2
  |  cmp dword [BASE+4], LJ_TISNUM
  |.if DUALNUM
  |  jne >4
  |  mov RB, dword [BASE]
  |1:  // Handle integers.
  |  cmp RA, RD; jae ->fff_resi
  |  cmp dword [BASE+RA*8-4], LJ_TISNUM; jne >3
  |  cmp RB, dword [BASE+RA*8-8]
  |  cmovop RB, dword [BASE+RA*8-8]
  |  add RA, 1
  |  jmp <1
  |3:
  |  ja ->fff_fallback
  |  // Convert intermediate result to number and continue below.
  |  cvtsi2sd xmm0, RB
  |  jmp >6
  |4:
  |  ja ->fff_fallback
  |.else
  |  jae ->fff_fallback
  |.endif
  |
  |  movsd xmm0, qword [BASE]
  |5:  // Handle numbers or integers.
  |  cmp RA, RD; jae ->fff_resxmm0
  |  cmp dword [BASE+RA*8-4], LJ_TISNUM
  |.if DUALNUM
  |  jb >6

ffi/target/release/build/mlua-sys-6a99a2ae50f12319/out/luajit-build/build/src/vm_x86.dasc  view on Meta::CPAN

  ||case BC_ISLT:
  |   lt target
  ||break;
  ||case BC_ISGE:
  |   ge target
  ||break;
  ||case BC_ISLE:
  |   le target
  ||break;
  ||case BC_ISGT:
  |   gt target
  ||break;
  ||default: break;  /* Shut up GCC. */
  ||}
  |.endmacro

  case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT:
    |  // RA = src1, RD = src2, JMP with RD = target
    |  ins_AD
    |.if DUALNUM
    |  checkint RA, >7
    |  checkint RD, >8
    |  mov RB, dword [BASE+RA*8]
    |  add PC, 4
    |  cmp RB, dword [BASE+RD*8]
    |  jmp_comp jge, jl, jg, jle, >9
    |6:
    |  movzx RD, PC_RD
    |  branchPC RD
    |9:
    |  ins_next
    |
    |7:  // RA is not an integer.
    |  ja ->vmeta_comp
    |  // RA is a number.
    |  cmp dword [BASE+RD*8+4], LJ_TISNUM; jb >1; jne ->vmeta_comp
    |  // RA is a number, RD is an integer.
    |  cvtsi2sd xmm0, dword [BASE+RD*8]
    |  jmp >2
    |
    |8:  // RA is an integer, RD is not an integer.
    |  ja ->vmeta_comp
    |  // RA is an integer, RD is a number.
    |  cvtsi2sd xmm1, dword [BASE+RA*8]
    |  movsd xmm0, qword [BASE+RD*8]
    |  add PC, 4
    |  ucomisd xmm0, xmm1
    |  jmp_comp jbe, ja, jb, jae, <9
    |  jmp <6
    |.else
    |  checknum RA, ->vmeta_comp
    |  checknum RD, ->vmeta_comp
    |.endif
    |1:
    |  movsd xmm0, qword [BASE+RD*8]
    |2:
    |  add PC, 4
    |  ucomisd xmm0, qword [BASE+RA*8]
    |3:
    |  // Unordered: all of ZF CF PF set, ordered: PF clear.
    |  // To preserve NaN semantics GE/GT branch on unordered, but LT/LE don't.
    |.if DUALNUM
    |  jmp_comp jbe, ja, jb, jae, <9
    |  jmp <6
    |.else
    |  jmp_comp jbe, ja, jb, jae, >1
    |  movzx RD, PC_RD
    |  branchPC RD
    |1:
    |  ins_next
    |.endif
    break;

  case BC_ISEQV: case BC_ISNEV:
    vk = op == BC_ISEQV;
    |  ins_AD	// RA = src1, RD = src2, JMP with RD = target
    |  mov RB, [BASE+RD*8+4]
    |  add PC, 4
    |.if DUALNUM
    |  cmp RB, LJ_TISNUM; jne >7
    |  checkint RA, >8
    |  mov RB, dword [BASE+RD*8]
    |  cmp RB, dword [BASE+RA*8]
    if (vk) {
      |  jne >9
    } else {
      |  je >9
    }
    |  movzx RD, PC_RD
    |  branchPC RD
    |9:
    |  ins_next
    |
    |7:  // RD is not an integer.
    |  ja >5
    |  // RD is a number.
    |  cmp dword [BASE+RA*8+4], LJ_TISNUM; jb >1; jne >5
    |  // RD is a number, RA is an integer.
    |  cvtsi2sd xmm0, dword [BASE+RA*8]
    |  jmp >2
    |
    |8:  // RD is an integer, RA is not an integer.
    |  ja >5
    |  // RD is an integer, RA is a number.
    |  cvtsi2sd xmm0, dword [BASE+RD*8]
    |  ucomisd xmm0, qword [BASE+RA*8]
    |  jmp >4
    |
    |.else
    |  cmp RB, LJ_TISNUM; jae >5
    |  checknum RA, >5
    |.endif
    |1:
    |  movsd xmm0, qword [BASE+RA*8]
    |2:
    |  ucomisd xmm0, qword [BASE+RD*8]
    |4:
  iseqne_fp:
    if (vk) {
      |  jp >2				// Unordered means not equal.
      |  jne >2